← GUMP
Chip Fast
Design chips on your laptop.
$25,000/mo
40 million gates in 4.5 seconds with Metal GPU acceleration (Apple Silicon). Up to 5,000 gates in seconds via pip install. Spectral placement using Laplacian eigenvectors, global routing with congestion estimation, wire length optimization, and full netlist parsing. The exploration phase of chip design — where you try 50 configurations before committing — no longer requires a server farm.
We're not replacing tapeout. The last mile needs a PDK under NDA and a foundry relationship. Everything before that — early placement, routing estimation, what-if analysis, architectural exploration — we do better and faster than tools that cost 300x more. Metal GPU sparse matmul, AMG coarsening, double-buffered pipeline. Benchmarked.
WHAT YOU GET
40M gate placement in 4.5s (Metal GPU); ~5K gates via pip
Spectral placement via Laplacian eigenvectors
Global routing with congestion estimation
Wire length optimization
Full netlist parser (Verilog, BLIF, DEF)
What-if analysis: try 50 configs in minutes
Metal GPU acceleration on Apple Silicon
Exportable placement and routing reports
GPU-accelerated spectral placement on Apple Silicon
Hardware-signed chip designs via Secure Enclave
WHAT THIS IS / WHAT THIS ISN'T
WHAT THIS IS
Spectral placement engine for early-stage chip exploration. Quantile-mapped Laplacian eigenvector placement with row legalization, Manhattan routing estimation, and congestion analysis. Tested: wire length reduction >20% vs random at 500+ gates.
WHAT THIS ISN'T
A complete EDA flow. No detailed routing, no DRC, no power optimization, no LEF/DEF support (yet). This is the exploration phase — what-if analysis, placement quality estimation, missing connection detection. The last mile to tapeout still needs Cadence or OpenROAD with a PDK.
YEAH BUT
"You can't replace Cadence."
We're not replacing tapeout — we're replacing the $750K exploration phase. Early placement, routing estimation, what-if analysis. The last mile needs a PDK under NDA. Everything before that, we do better and faster.
"OpenROAD is free."
OpenROAD is a "moon shot" their own docs call incomplete. No commercial support. Limited PDK support. GUMP runs out of the box. No configuration marathon. No missing dependencies. Try the demo.
"40M gates sounds impossible on a laptop."
Metal GPU sparse matmul + AMG coarsening + double-buffered pipeline. Benchmarked. 4.5 seconds. The trick is spectral methods — you don't touch every gate individually. You solve for the eigenvectors of the connectivity graph. That's a sparse linear algebra problem, and Apple Silicon is very good at those.
VS THE COMPETITION
Cadence Innovus
$750K-2M/yr — 3-year lock-in. Requires server farm. Weeks to set up.
Chip Fast: $25,000/mo. Runs on your laptop. No lock-in. Results in seconds.
Synopsys ICC2
$500K+/yr — same lock-in model. Same server requirements.
Chip Fast: same spectral math, fraction of the cost. Exploration in minutes, not days.
OpenROAD
Free but incomplete. No commercial support. Limited PDK ecosystem.
Chip Fast: works out of the box. Supported. 40M gates benchmarked. Try the demo below.
TRY IT
3 free analyses. Fixed sample data. Your own data requires a license.
TESTING
Unit tests, adversarial input testing (None, wrong types, NaN, empty data, unicode), real user workflow testing, and cross-product integration testing. Every public function handles every input permutation without crashing. 673 quality tests across all products, zero failures. Self-verifying: the product can audit its own output.
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Get Chip Fast — $25,000/mo
After purchase: setup guide